Experimental demonstration of a broadband, ultra-compact, and fabrication-tolerant silicon photonic 10% power tap

Abstract

Inverse design approaches with topology optimization can yield in highly efficient devices; however designing fabrication-compatible, broadband, yet simultaneously fabrication-tolerant devices still widely remains a challenge. Here, we design a broadband and fabrication-tolerant 10% silicon-based power tap using 3D-FDTD simulations and topology optimization, and demonstrate its experimental performance. The power tap has a compact footprint of 7.0 mu mx3.1 mu m, and achieves a broadband and spectrally flat operation from 1500 nm to 1600 nm. The device was specifically built to be fabrication-tolerant using an approach that maintains high performance under over-etch and under-etch scenarios by maximizing the contiguous area of the silicon layer in the final device. This tolerance was verified with 3D-FDTD simulations with 15 nm over-etch and under-etch modifications, demonstrating a change of less than 0.64 dB at either output port compared to the original device response at 1550 nm. The designed power tap was fabricated using a standard 220 nm thick silicon-on-insulator platform. The experimental measurements match closely with the design target and 3D-FDTD results, achieving state-of-the-art performance with excess losses as low as 0.23 dB and broadband operation. The output ports of the device also exhibit extremely flat spectra, where the transmission remains between 0.86 and 0.92 for the through port, and between 0.06 and 0.14 for the tap port throughout the 1500-1600 nm spectral range. These results represent the state-of-the-art experimental performance in compact power taps, and prove the effectiveness of fabrication-tolerant optimization.