Publication:
A monolithic approach to downscaling silicon piezoresistive sensors

dc.contributor.coauthorLeblebici, Yusuf
dc.contributor.departmentN/A
dc.contributor.departmentDepartment of Mechanical Engineering
dc.contributor.kuauthorEsfahani, Mohammad Nasr
dc.contributor.kuauthorAlaca, Burhanettin Erdem
dc.contributor.kuprofilePhD Student
dc.contributor.kuprofileFaculty Member
dc.contributor.otherDepartment of Mechanical Engineering
dc.contributor.researchcenterKoç University Surface Science and Technology Center (KUYTAM) / Koç Üniversitesi Yüzey Teknolojileri Araştırmaları Merkezi (KUYTAM)
dc.contributor.schoolcollegeinstituteGraduate School of Sciences and Engineering
dc.contributor.schoolcollegeinstituteCollege of Engineering
dc.contributor.yokidN/A
dc.contributor.yokid115108
dc.date.accessioned2024-11-09T23:37:04Z
dc.date.issued2017
dc.description.abstractMulti-scale integration remains the primary challenge in the fabrication of miniature piezoresistive sensors, as the co-fabrication of a silicon nanowire along with a microscale shuttle is the main architecture facilitating high-sensitivity transduction. The efforts in this field are marred by the lack of batch techniques compatible with semiconductor manufacturing. A technology is introduced here that leads to the fabrication of a piezoresistive silicon nanowire sharing the same single-crystalline device layer of a thick silicon-on-insulator wafer as the microscale component. The approach is based on a combination of high-resolution lithography with a two-stage etching process. The demonstration is carried out by spanning an electrostatic comb-drive actuator and a micromechanical amplifier by a single nanowire. A gage factor range of 135-145 is obtained, corresponding to an almost 20% resistance change for a nanowire strain of 1.26 x 10(-3). The technique is shown to generate a two-order-of-magnitude scale difference within the same silicon crystal. It also provides ease of electrical access to the nanowire, as the nanowire does not remain buried underneath the thick micromechanical system. With the associated lack of high-temperature processes and its CMOS-compatibility, the technique is a promising enabler for future miniaturized piezoresistive sensors. [2017-0007]
dc.description.indexedbyWoS
dc.description.indexedbyScopus
dc.description.issue3
dc.description.openaccessNO
dc.description.sponsorshipTubitak [112E058]
dc.description.sponsorshipSwiss Government Excellence Grant This work was supported by Tubitak under Grant 112E058. The work of M. Nasr Esfahani was supported by the Swiss Government Excellence Grant. Subject Editor M. Wong.
dc.description.volume26
dc.identifier.doi10.1109/JMEMS.2017.2679219
dc.identifier.eissn1941-0158
dc.identifier.issn1057-7157
dc.identifier.scopus2-s2.0-85017138742
dc.identifier.urihttp://dx.doi.org/10.1109/JMEMS.2017.2679219
dc.identifier.urihttps://hdl.handle.net/20.500.14288/12765
dc.identifier.wos402736900017
dc.keywordsNanoelectromechanical systems
dc.keywordsPiezoresistive sensors
dc.keywordsSilicon nanowire
dc.keywordsGgage factor
dc.keywordsMEMS stretcher
dc.keywordsMultiscale integration
dc.keywordsdDep reactive ion etching
dc.languageEnglish
dc.publisherIeee-Inst Electrical Electronics Engineers Inc
dc.sourceJournal Of Microelectromechanical Systems
dc.subjectEngineering
dc.subjectElectrical electronic engineering
dc.subjectNanoscience
dc.subjectNanotechnology
dc.subjectInstruments
dc.subjectInstrumentation
dc.subjectPhysics
dc.subjectApplied physics
dc.titleA monolithic approach to downscaling silicon piezoresistive sensors
dc.typeJournal Article
dspace.entity.typePublication
local.contributor.authorid0000-0002-6973-2205
local.contributor.authorid0000-0001-5931-8134
local.contributor.kuauthorEsfahani, Mohammad Nasr
local.contributor.kuauthorAlaca, Burhanettin Erdem
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relation.isOrgUnitOfPublication.latestForDiscoveryba2836f3-206d-4724-918c-f598f0086a36

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