Publication: Bringing order to sparsity: a sparse matrix reordering study on multicore CPUs
dc.contributor.coauthor | Trotter, James D. | |
dc.contributor.coauthor | Ekmekçibaşı, Sinan | |
dc.contributor.coauthor | Langguth, Johannes | |
dc.contributor.coauthor | Ilic, Aleksandar | |
dc.contributor.department | Department of Computer Engineering | |
dc.contributor.department | Department of Computer Engineering | |
dc.contributor.kuauthor | Torun, Tuğba | |
dc.contributor.kuauthor | Düzakın, Emre | |
dc.contributor.kuauthor | Erten, Didem Unat | |
dc.contributor.schoolcollegeinstitute | College of Engineering | |
dc.contributor.schoolcollegeinstitute | Graduate School of Sciences and Engineering | |
dc.date.accessioned | 2024-12-29T09:39:32Z | |
dc.date.issued | 2023 | |
dc.description.abstract | Many real-world computations involve sparse data structures in the form of sparse matrices. A common strategy for optimizing sparse matrix operations is to reorder a matrix to improve data locality. However, it's not always clear whether reordering will provide benefits over the unordered matrix, as its effectiveness depends on several factors, such as structural features of the matrix, the reordering algorithm and the hardware that is used. This paper aims to establish the relationship between matrix reordering algorithms and the performance of sparse matrix operations. We thoroughly evaluate six different matrix reordering algorithms on 490 matrices across eight multicore architectures, focusing on the commonly used sparse matrix-vector multiplication (SpMV) kernel. We find that reordering based on graph partitioning provides better SpMV performance than the alternatives for a large majority of matrices, and that the resulting performance is explained through a combination of data locality and load balancing concerns. © 2023 Owner/Author(s). | |
dc.description.indexedby | Scopus | |
dc.description.openaccess | Hybrid Gold Open Access | |
dc.description.publisherscope | International | |
dc.description.sponsoredbyTubitakEu | TÜBİTAK | |
dc.description.sponsors | This work was supported by the SparCity project of the European High-Performance Computing Joint Undertaking under grant agreement No. 956213. Koç University is supported by the Turkish Science and Technology Research Centre Grant No. 120N003, and INESC-ID is supported by Fundação para a Ciência e a Tec-nologia (FCT) through the UIDB/50021/2020 project. The research presented in this paper has also made use of the Experimental Infrastructure for Exploration of Exascale Computing (eX3), which is financially supported by the Research Council of Norway under contract 270053. | |
dc.identifier.doi | 10.1145/3581784.3607046 | |
dc.identifier.isbn | 979-840070109-2 | |
dc.identifier.quartile | N/A | |
dc.identifier.scopus | 2-s2.0-85179552954 | |
dc.identifier.uri | https://doi.org/10.1145/3581784.3607046 | |
dc.identifier.uri | https://hdl.handle.net/20.500.14288/23029 | |
dc.keywords | Graph partitioning | |
dc.keywords | Matrix reordering | |
dc.keywords | Multicore | |
dc.keywords | Sparse matrix-vector multiply | |
dc.language | en | |
dc.publisher | Association for Computing Machinery, Inc | |
dc.relation.grantno | 120N003 | |
dc.source | Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2023 | |
dc.subject | Matrix algebra | |
dc.title | Bringing order to sparsity: a sparse matrix reordering study on multicore CPUs | |
dc.type | Conference proceeding | |
dspace.entity.type | Publication | |
local.contributor.kuauthor | Torun, Tuğba | |
local.contributor.kuauthor | Düzakın, Emre | |
local.contributor.kuauthor | Erten, Didem Unat | |
relation.isOrgUnitOfPublication | 89352e43-bf09-4ef4-82f6-6f9d0174ebae | |
relation.isOrgUnitOfPublication.latestForDiscovery | 89352e43-bf09-4ef4-82f6-6f9d0174ebae |
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