Publication: Accurate prediction of random telegraph noise effects in srams and drams
dc.contributor.coauthor | Aadithya, Karthik V. | |
dc.contributor.coauthor | Venugopalan, Sriramkumar | |
dc.contributor.coauthor | Roychowdhury, Jaijeet | |
dc.contributor.department | Department of Electrical and Electronics Engineering | |
dc.contributor.kuauthor | Demir, Alper | |
dc.contributor.kuprofile | Faculty Member | |
dc.contributor.other | Department of Electrical and Electronics Engineering | |
dc.contributor.schoolcollegeinstitute | College of Engineering | |
dc.contributor.yokid | 3756 | |
dc.date.accessioned | 2024-11-10T00:00:46Z | |
dc.date.issued | 2013 | |
dc.description.abstract | With aggressive technology scaling and heightened variability, circuits such as SRAMs and DRAMs have become vulnerable to random telegraph noise (RTN). The bias dependence (i.e., non-stationarity), bi-directional coupling, and high inter-device variability of RTN present significant challenges to understanding its circuit-level effects. In this paper, we present two computer-aided design (CAD) tools, SAMURAI and MUSTARD, for accurately estimating the impact of non-stationary RTN on SRAMs and DRAMs. While traditional (stationary) analysis is often overly pessimistic (e. g., it overestimates RTN-induced SRAM failure rates), the predictions made by SAMURAI and MUSTARD are more reliable by virtue of non-stationary analysis. | |
dc.description.indexedby | WoS | |
dc.description.indexedby | Scopus | |
dc.description.issue | 1 | |
dc.description.openaccess | NO | |
dc.description.publisherscope | International | |
dc.description.volume | 32 | |
dc.identifier.doi | 10.1109/TCAD.2012.2212897 | |
dc.identifier.eissn | 1937-4151 | |
dc.identifier.issn | 0278-0070 | |
dc.identifier.quartile | Q2 | |
dc.identifier.scopus | 2-s2.0-84871746370 | |
dc.identifier.uri | http://dx.doi.org/10.1109/TCAD.2012.2212897 | |
dc.identifier.uri | https://hdl.handle.net/20.500.14288/15862 | |
dc.identifier.wos | 314676500007 | |
dc.keywords | 1/F noise | |
dc.keywords | Circuit noise | |
dc.keywords | Circuit simulation | |
dc.keywords | Computational modeling | |
dc.keywords | Computer-aided analysis | |
dc.keywords | DRAM chips | |
dc.keywords | Error probability | |
dc.keywords | Failure analysis | |
dc.keywords | SRAM chips | |
dc.language | English | |
dc.publisher | IEEE-Inst Electrical Electronics Engineers Inc | |
dc.source | IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems | |
dc.subject | Computer science, hardware and architecture | |
dc.subject | Computer science, interdisciplinary applications | |
dc.subject | Engineering, electrical and electronic | |
dc.title | Accurate prediction of random telegraph noise effects in srams and drams | |
dc.type | Journal Article | |
dspace.entity.type | Publication | |
local.contributor.authorid | 0000-0002-1927-3960 | |
local.contributor.kuauthor | Demir, Alper | |
relation.isOrgUnitOfPublication | 21598063-a7c5-420d-91ba-0cc9b2db0ea0 | |
relation.isOrgUnitOfPublication.latestForDiscovery | 21598063-a7c5-420d-91ba-0cc9b2db0ea0 |