Multi-GPU communication schemes for iterative solvers: when CPUs are not in charge

dc.contributor.authorid0000-0002-2351-0770
dc.contributor.authorid0000-0002-9603-2466
dc.contributor.authorid0000-0001-7235-6418
dc.contributor.authoridN/A
dc.contributor.coauthorWahib, Mohamed
dc.contributor.departmentDepartment of Computer Engineering
dc.contributor.departmentN/A
dc.contributor.departmentN/A
dc.contributor.departmentN/A
dc.contributor.kuauthorErten, Didem Unat
dc.contributor.kuauthorSağbili Doğan
dc.contributor.kuauthorBaydamirli Javid
dc.contributor.kuauthorIsmayilov, Ismayil
dc.contributor.kuprofileFaculty Member
dc.contributor.kuprofilePhD Student
dc.contributor.kuprofilePhD Student
dc.contributor.kuprofileMaster Student
dc.contributor.schoolcollegeinstituteCollege of Engineering
dc.contributor.schoolcollegeinstituteGraduate School of Sciences and Engineering
dc.contributor.schoolcollegeinstituteGraduate School of Sciences and Engineering
dc.contributor.schoolcollegeinstituteGraduate School of Sciences and Engineering
dc.contributor.yokid219274
dc.contributor.yokidN/A
dc.contributor.yokidN/A
dc.contributor.yokidN/A
dc.date.accessioned2025-01-19T10:31:47Z
dc.date.issued2023
dc.description.abstractThis paper proposes a fully autonomous execution model for multi-GPU applications that completely excludes the involvement of the CPU beyond the initial kernel launch. In a typical multi-GPU application, the host serves as the orchestrator of execution by directly launching kernels, issuing communication calls, and acting as a synchronizer for devices. We argue that this orchestration, or control flow path, causes undue overhead and can be delegated entirely to devices to improve performance in applications that require communication among peers. For the proposed CPU-free execution model, we leverage existing techniques such as persistent kernels, thread block specialization, device-side barriers, and device-initiated communication routines to write fully autonomous multi-GPU code and achieve significantly reduced communication overheads. We demonstrate our proposed model on two broadly used iterative solvers, 2D/3D Jacobi stencil and Conjugate Gradient(CG). Compared to the CPU-controlled baselines, the CPU-free model can improve 3D stencil communication latency by 58.8% and provide a 1.63x speedup for CG on 8 NVIDIA A100 GPUs. The project code is available at https://github.com/ParCoreLab/CPU-Free-model. © 2023 Owner/Author(s).
dc.description.indexedbyScopus
dc.description.openaccessAll Open Access; Bronze Open Access
dc.description.publisherscopeInternational
dc.description.sponsorsThis project has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No 949587).
dc.identifier.doi10.1145/3577193.3593713
dc.identifier.isbn979-840070056-9
dc.identifier.quartileN/A
dc.identifier.scopus2-s2.0-85168413592
dc.identifier.urihttps://doi.org/10.1145/3577193.3593713
dc.identifier.urihttps://hdl.handle.net/20.500.14288/26289
dc.keywordsGPU-initiated communication
dc.keywordsIterative solvers
dc.keywordsMulti-GPU
dc.keywordsNVSHMEM
dc.keywordsPersistent kernels
dc.languageen
dc.publisherAssociation for Computing Machinery
dc.relation.grantnoHorizon 2020 Framework Programme, H2020, (949587); European Research Council, ERC
dc.sourceProceedings of the International Conference on Supercomputing
dc.subjectComputer science
dc.titleMulti-GPU communication schemes for iterative solvers: when CPUs are not in charge
dc.typeConference proceeding

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