Precise event sampling-based data locality tools for AMD multicore architectures

Abstract

We propose ComDetective+, an inter-thread communication analyzer, and ReuseTracker+, a reuse distance analyzer, that leverage the hardware features in AMD processors to support low-overhead profiling. Both tools employ the instruction-based sampling (IBS) facility and debug registers in AMD processors to detect inter-thread communication and data reuse. Different from prior arts, ComDetective+ differentiates the communication into true and false sharing, and ReuseTracker+ measures reuse distance in private and shared caches by also considering cache line invalidation with low overhead. Both tools can attribute the communications and reuses to source code lines. To our knowledge these tools are two of the few profiling tools designed specifically for AMD x86 architectures using IBS. Our tools are timely and relevant considering the rise in numbers of AMD processor based data centers and HPC systems. We perform experiments to evaluate the accuracy and overheads of the proposed tools on an AMD machine with two-socket EPYC 7352 processors. ComDetective+ exhibits high accuracy while introducing 5.14xruntime and 1.4x memory overheads. ReuseTracker+ also displays high accuracy, which is 95%, with 11.76x runtime and 1.46x memory overheads. These overheads are much lower than the overheads of existing simulators and code instrumentation-based tools. Lastly, we demonstrate the usage of the tools by having COMDETECTIVE+ and REUSETRACKER+ facilitate the code refactoring of two data mining benchmarks to improve their performance by up to 29%.