(Institute of Electrical and Electronics Engineers (IEEE), 2015) Peric, O.; Sacchetto, D.; Fantner, G.E.; Leblebici, Y.; Department of Mechanical Engineering; Taşdemir, Zuhal; Alaca, Burhanettin Erdem; Faculty Member; Department of Mechanical Engineering; College of Engineering; N/A; 115108
A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 μm is demonstrated with a future prospect for 50 μm opening up new possibilities for the deterministic integration of nanowires with microsystems. Nanowires with in-plane dimensions as low as 20 nm and aspect ratios up to 150 are obtained. Nanomechanical characterization through bending tests further confirms structural integrity of the connection between nanowires and anchoring Si microstructures.
