Simplified top-down fabrication of sub-micron silicon nanowires

Abstract

Silicon nanowires are among the most promising nanotechnology building blocks in innovative devices with numerous applications as nanoelectromechanical systems. Downscaling the physical size of these devices and optimization of material functionalities by engineering their structure are two promising strategies for further enhancement of their performance for integrated circuits and future-generation sensors and actuators. Integration of silicon nanowires as transduction elements for inertial sensor applications is one prominent example for an intelligent combination of such building blocks for multiple functionalities within a single sensor. Currently, the efforts in this field are marred by the lack of batch fabrication techniques compatible with semiconductor manufacturing. Development of new fabrication techniques for such one-dimensional structures will eliminate the drawbacks associated with assembly issues. The current study aims to explore the limits of batch fabrication for a single nanowire within a thick Si layer. The objective of the current work goes beyond the state of the art with significant improvements to the recent viable approach on the monolithic fabrication of nanowires, which was based on a conformal side-wall coating for the protection of the nanoscale silicon line followed by deep etch of the substrate transforming the protected layer into a silicon nanowire. The newly developed fabrication approach eliminates side wall protection and thereby reduces both process complexity and process temperature. The technique yields promising results with possible improvements for future micro and nanofabrication processes.