Publication: Monolithic fabrication of silicon nanowires bridging thick silicon structures
Program
KU-Authors
KU Authors
Co-Authors
Peric, Oliver
Sacchetto, Davide
Fantner, Georg Ernest
Leblebici, Yusuf
Publication Date
Language
Type
Embargo Status
Journal Title
Journal ISSN
Volume Title
Alternative Title
Abstract
A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 mu m is demonstrated with a future prospect for 50 mu m opening up new possibilities for the deterministic integration of nanowires with microsystems. Nanowires with in-plane dimensions as low as 20 nm and aspect ratios up to 150 are obtained. Nanomechanical characterization through bending tests further confirms structural integrity of the connection between nanowires and anchoring Si microstructures.
Source
Publisher
IEEE-Inst Electrical Electronics Engineers Inc
Subject
Electrical electronics engineering, Nanoscience, Nanotechnology, Physics, Materials science
Citation
Has Part
Source
IEEE Transactions on Nanotechnology
Book Series Title
Edition
DOI
10.1109/TNANO.2018.2868712